Error Correction Methods for Latency-constrained Flash Memory Systems
Maintaining the reliability of data stored in Flash devices and reading it correctly has become a challenge as the demand for higher density is forcing aggressive shrinking of Flash architectures. For all Flash systems, especially latency-constrained NOR Flash, an on-chip error correction code (ECC) is the only viable and robust solution to this problem.Hamming decoder block diagram A Hamming code is the simplest to understand and the easiest to implement single bit correction code. However, it does not suffice ... This allows only single bit error detection and correction. If the distance isanbsp;...
| Title | : | Error Correction Methods for Latency-constrained Flash Memory Systems |
| Author | : | |
| Publisher | : | ProQuest - 2008 |
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